Can someone tell me how to access the HPS UART0 peripheral registers using the System Console? My setup:
- Custom board with Cyclone V SoC
- Boot all from SD (SPL, U-boot, Linux)
I do not see any characters coming out of the HPS UART0 TX pin. I was hoping to be able to "bit bang" the UART registers to force a character to be transmitted. The only way I know to do this is using the System Console. My problem is that I can't figure out what address it is at with respect to the f2h_axi_slave. In my Qsys system, I have instantiated a "JTAG to Avalon Master Bridge" and connected its master port to the f2h_axi_slave port of the HPS instantiation.
I have read through the System Interconnect section of the Cyclone V Handbook which provides a memory map. It says the peripherals should be in the range 0xff40_0000 to 0xfffd_0000, and the UART Controller section of the doc says it should be at 0xffc0_2000. However, when I read this location (128 words) in System Console, I see all zeros. Can I not access the HPS peripherals from the f2h_axi_slave port? The doc says it should be accessible.
I am able to read the FPGA peripherals though, like the SysID register. I get the right value back, so I can see I have access to the h2f_lw_axi_master port via the f2h_axi_slave port.
