- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello everyone,
I'm developing a project on Arria V SoC Development Kit using HPS and FPGA, it means I have to create a project in Quartus using QSYS. I have tested my design on FPGA and it worked fine. I got the correct signal on FMCA pinout. But I want to include HPS in my design for configuration and I/O purpose from Linux. After I created a project in Qsys with my design on FPGA as an IP with AXI interfaces included, the output became false. Is there anyone who has done a similar project using IP with AXI interface and HPS? Can you refer me to some tutorial? I have found very few tutorials that explains how to do what I want. Because I tested my IP before on FPGA, I'm sure it works fine. So the problem is when I built the project using Qsys and HPS. This project is quite important and I would really like to make it work. Any suggestion is welcome. Thank you so much. Regards,Link Copied
0 Replies
![](/skins/images/B7BA37F9CE4B52FF7CAE1FB0388839C8/responsive_peak/images/icon_anonymous_message.png)
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page