Want to determine Altera Development Board SOPC Recipe equivalent?

[Altera_Forum]

hi, 

 I have a Altera GX Development board.  I am using Quartus 9.1 SP2.  I am writing my own Windows driver which needs to do DMA transfers from the device memory to PC Host.  I won't be using HAL and I won't be using the Jungo WinDriver kit.  I have my own SOPC recipe which I've tried having Simple DMA on, and also Scatter Gather.....as ultimately, I am going to require multiple DMA engines to service multiple streams of data all running in parallel.  I'm having trouble getting any decent throughput the Scatter Gather....i.e. just 15MB/s....so something is obviously wrong. I need to make sure there are no contentions and that I am getting the maximum benefit from Burst mode.  The Altera Demo application has a throughput of 750Mb/s.  Unless I am mistaken....the recipe of the firmware that comes by default on the Dev Board isn't published anywhere....therefore you don't know where the Base Addresses of the various slaves etc are located, so you can't program them directly....so instead you have to go through the WinDriver layer, etc?  Therefore it would a) be nice to know how to make my own recipe which matches as close as possible to the default Altera Dev board so that rules out that variable or b) use the default Dev Board firmware, but get hold of where the DMA engine, DDR2 memory, etc Base Offets, are located.  Thanks for any help.

[Altera_Forum]

Hmmmmm...it looks like the Altera Demo is doing DMA transfers onboard, and not to PC Host, thus I can't get comparable figures. 

 I can get 30MB/sec going from onboard DDR2 to PC Host now.  I've played with the various bursting options as follows:  * I set 8 beats in the DDR2 memory settings * 8 wide read burst signal and 8 wide write burst signal in the SGDMA engine settings * data width 64 for Data and Error Widths (but I don't think that applies when you are bursting....only for non-bursts) * use the High Performance II Memory controller, with Local Maximum Burst count 8.  The descriptors are put into the onboard DDR2 memory. I am NOT enabling bursting on read descriptor read master. Maybe I can get an improvement by either enabling bursting, or put the descriptors into onchip memory ? but it would be very small won't it ?  ...however, I would like to find out what the theoritcal/pratical maximum I could achieve with the SGDMA...between onboard DDR2 and PC Host.....anyone have any ideas?