I have a Cyclone V ST system.
I'm trying to transfer buffers of memory from the HPS to my FPGA. Since the FPGA needs to use it's DDR memory for other things, I thought I'd get the ARM to allocate them using dma_alloc_coherent. My driver works, and I can allocate a 100k buffer. But as soon as I try and allocate a 400k buffer it says that the coherent pool is too small, and that I need to set the coherent_pool= parameter in the kernel parameters.
So I've editted my startup script to allocate 8M of ram to the coherent pool (added coherent_pool=8M) but now it doesn't allocate any memory to the pool, and I can't allocate anything. It complains that the coherent pool hasn't been initialised, but the startup messages show that it can't allocate it. Why not? Has anyone succeeded adding the coherent_pool= parameter?
