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hello everyone!
these days i have try to add a off chip sram to niosII sys through Avalon-MM Tristate Bridge.whitch adress bus and data bus must shared with a off chip flash. sram:is61lv25616(adress 18 data 16) flash:am29lv320d(adress 21 data 16) in the following text Records my step 1:first ,i click "new compoment" in the sopc builder skip to the "HDL files" tab select no hdl files and did not add a simulation file (the book that Altera Provided say:if your new compoment is a off chip device,do not need to add any HDL files) 2:change to the "signals" tab to creat signals to the off chip sram. i created :adress bus (width:18 ,direction:input,interface:avalon tristate slave,port:adress) data bus (width:16 ,direction:bidir,interface:avalon tristate slave,port:data) chipselect_n (width:1 ,direction:input,interface:avalon tristate slave,port:chipselect_n) write_n (width:1 ,direction:input,interface:avalon tristate slave,port:write_n) read_n (width:1 ,direction:input,interface:avalon tristate slave,port: read_n) byteenable_n (width:2 ,direction:input,interface:avalon tristate slave,port: byteenable_n) 3,then the next TAB "interface" there is only one interface typed "Avalon Tristate Slave" named "Avalon tristate slave" slave adressing:DYNAMIC Minimum Arbitration Shares :1 and the timing is default 4,turn to the "Compoment Wizard" TAB add class name "sarm18x16" select Compoment Group :Memories and Memory Controllers/SRAM else default. 5,finish this wizard(compoment creating finished) 6,turn to the sopc builder ,find the sram in the compoment group and add it,connect the sram to "tristate master" interace of the Avalon-MM Tristate Bridge fix the adress to clear up the adress warning then generat this system after these steps turn to the Quartera II sorftware ,add the sopc system inst that generated by sopc builder just a moment ago . well,i can only see a data bus on this block ,the other signals like chipselect_n ,write_n,read_n ..disappeared,but flash signals are correct the problem is the sopc builder did not determine my new compoment as off chip device,the data bus appears as global signals .that is why?the very correct steps are how? can anyone help me,you will helps me a lot.Link Copied
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