We have recently moved from Cyclone chips to Cyclone II chips. Both boards use SRAM as the main memory but we are not able to run code from the external SRAM, it only works from the internal ram.
The hardware is the tiny Nios processor, Jtag uart, 20kB internal ram, 1MB external SRAM (IDT component for SOPC builder)
The test software is hello_alt_main, with small drivers and C library.
I have tried both Nios 5.1 and Nios 6.0 using the Eclipse IDE.
In the last working version i linked the code to the external SRAM with the exception for the .stack, which was linked into the internal ram.
With the version with everything linked into external SRAM I can step (debugger) a few assembly instructions than the processor restarts from the reset vector SRAM. I observed the main SRAM memory at the end where the stack is located and at some single instruction steps more than a few memory locations change value. The locations where the rest of the code is located seem to behave well (it works if the stack is internal).
I can set memory locations in the stack area using the debugger without problems. And it does not seem to be an address bus related problem.
any suggestions?
IzI
