file io with NIOS II

[euem789]

Hi all

I wrote a code to read the text file

for implementing in FPGA board (DE1-SOC) with NIOS II ,

but when I build the project,  the elf file wasn't generated.

here's my code 

--------------------------------------------------------------------------------------------

#include <stdio.h>

int main()
{
  int num;
  int ret;

  FILE * fp;
  fp=fopen("C:\\users\\HW\\Desktop\\test_num.txt","r");

  ret=fscanf(fp,"%d",&num);

  printf("number is %d \n",num+ret);

  fclose(fp);
  return 0;
}

------------------------------------------------------------------------------------------------------------

1. if there is a problem, Could somebody tell me what's wrong with it??

(with detail , I'll be really appreciated)

++ 2. I heard that there are many ways to transfer data from host PC to FPGA board,

like UARR

I'm a newbie with FPGA,

so I DESPERATELY need some help......

[EricMunYew_C_Intel]

Hi, Dong Wook

Can you forward your error log or picture to me ?

Thanks.

Eric

[euem789]

Appreciate for your reply Eric!

When I compiled , it said there was only an error with making elf file and others were fine.

Anyway, I solved the problem with elf file by increasing the amount of On-chip-memory.

but this time I faced another problem.... (reading file)

compile is enable and also able to run with hardware,

but the result is not what I wanted. ( with file path in eclipse I guess)

here's the code and also the console picture with it

#include <stdio.h>

int main()
{
   int num;
   FILE *fptr;

   if ((fptr = fopen("C:\\test_num.txt","r")) == NULL){
       printf("Error! opening file");
       return 0;
   }

   fscanf(fptr,"%d", &num);

   printf("Value of n=%d", num);
   fclose(fptr);

   return 0;
}

I'm wondering what's wrong this time, and also am I doing right...

thanks for reading

[EricMunYew_C_Intel]

Hi, Dong Wook

By the way, may I know you are using UART or JTAG UART ?

Can you forward your Qsys diagram to me ?

Thanks.

Eric

[EricMunYew_C_Intel]

Hi, Dong Wook

Can you try to enable the altera_hostfs in your BSP Editor under Software Packages tab (to enable HAL file system) ?

There is mount point which within the HAL file system. For example, if you name the mount point /mnt/host and the project directory on you host computer is /sofware/project1, in a HAL-based program, the following code opens the file /sofware/project1/datafile.dat.:

fopen(“/mnt/host/datafile.dat”, “r”);

Thanks.

Eric

[EricMunYew_C_Intel]

Hi, Dong Wook

In the BSP Editor, under Software Packages, remember to enter /mnt/host in altera_hostfs->hostfs_name.

Thanks.

Eric

[euem789]

Appreciate for your reply again, Eric

I'm using JTAG-UART (USB -blaster)

and here is my Qsys diagram

Actually my final goal is performing 'edge dectection'  with binary or hex file through FPGA board. That's why I was finding a way to read the file.

BTW, I found there are some ways to read file including the Host-Based-file system you mentioned, and I heard that it is only able to do in debuging mode....

thanks for reading

[EricMunYew_C_Intel · Accepted solution]

Hi, Dong Wook

You are right.

However, there is another way, ie using a character-mode device like UART.

Below example is to write characters to a UART called uart1. You can find the device name (/dev/uart1) in the system.h

#include <stdio.h>

#include <string.h>

int main (void)

{

char* msg = "hello world";

FILE* fp;

fp = fopen ("/dev/uart1", "w");

if (fp!=NULL) { fprintf(fp, "%s",msg); fclose (fp);}

return 0;

}

Thanks.

Eric

[euem789]

Hi, eric

I didn't solve the problem yet,

and only knew how to perform generating hex->bmp file // sobel -edge-detect

through quartus testbench (altera-modelsim using fopen&fclose without NIOS)

I think I have to study more to ask detail & intuitive question later.

thanks for every help 

[EricMunYew_C_Intel]

Hi, Dong Wook

Thanks for your appraisal, and I noted.

For my recommendation below, you may consider using a HyperTerminal or other tools to transmit character by character from your PC to the target FPGA hardware board. Then you may apply fread() or fscanf() instead in your code to read from your PC to the target FPGA board.

Please let me know if you have question.

Yon can proceed to open a new ticket, welcome.

Again thanks for your appraisal.

Thanks.

Eric

[EricMunYew_C_Intel]

Hi, Dong Wook

Can we close the case ? you may open a new case for your next inquiry.

Thanks.

Eric

[euem789]

Hi, eric

Recently,  I'm also new to these kind of community,  so I don't know the exact meaning

'close the case' ...? you're talking about

can you tell me in more detail..?? 

[EricMunYew_C_Intel]

Hi, Dong Wook

Not a problem. After you opened a case in the community, and after getting a feedback or answer, you may want to close the case if it answered or helped your problem. When you have inquiry again, you can open a new one.

Thanks.

Eric

[EricMunYew_C_Intel]

Hi, Dong Wook

Can I close the case if you have no more inquiry ?

Thanks.

Eric

[euem789]

Hi  Eric

Yes may

I  think I'm done with this problem.

thanks