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sorry, my english is poor.
i want to connect with Nios II system(SOPC Builder) and an altsynram(User Logic) now, i want to write a data (16 signed bits) to altsynram(data bits=16, addr bits=8) but the altsynram's CLK is connect to external oscillator (12.288MHz), i can't write data to altsynram properly.(my Nios II system's CLK is 50MHz) Orz example: IOWR(RAM_BASE, 0x00, 0x1234); IOWR(RAM_BASE, 0x01, 0x5678); x=IORD(RAM_BASE, 0x00); y=IORD(RAM_BASE, 0x01); correct answer should be x=0x1234, y=0x5678, but sometimes x=0x0000, y=0x5678 or x=0x1234, y=0x1234 or etc. my Nios II system and external oscillator are asynchronous, how to improve it?? thx <(_ _)>Link Copied
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Hi kewang,
Your avalon interface must meet the timing requirements of your altsyncram. There are many ways to do this ... and the appropriate solution will depend on your particular requirements. The easiest is to add some glue logic that takes advantage of the avalon waitrequest signal -- to make sure the avalon side meets the minimum setup and hold times for your ram. See http://www.altera.com/literature/manual/mnl_avalon_spec.pdf (http://www.altera.com/literature/manual/mnl_avalon_spec.pdf) Regards, --Scott
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