how to run nios2 without external flash and sram?

[Altera_Forum]

hello everyone, 

 I am a beginner of nios2, I design a board with 3 altera stratix FPGAs on it last year, now I want to use this board to do my first nios2 experiment , but there is only JTAG chain connect 3 FPGAs and no FPGA has its own external flash and sram. So I want to use onchip ram as flash and run the simplest software(such as 'hello world'), following is my questions:  To run 'hello world' program, I only need configure(using SOPC) onchip rom (read only ram) to store software image, beacuse access to onchip rom is very fast, so no read/write ram need to be configure and no copy is needed after reset, the code is fatching and executing direct from rom, is it right?  how much ram needed to store the software image for 'hello world' programe?  Thanks

[Altera_Forum]

Yes, you can run directly from on-chip memory (just put the reset address and the text section into the same memory). You need to make sure you download or reprogram the SOF every time as otherwise your global variables won't get initialised. 

 Hello world is quite large (about 60K) but small_hello_world is much smaller (just over 4K of code and initialised data). You'll need to allocate some stack space (I'd guess 4K for a small system) and possibly some more data space.  So, as I remember it, hello_world fits into 8k, obviously your system will need more if it does more.

[Altera_Forum]

Hello experts, 

 I know that I must combine .hex file into .sof file when using on-chip ram as code flash. but how to do it? I have compiled my hardware and create a .sof file, then I build software project successfully using NIOS2 IDE and two .hex file appears on my project directory, one for Instruction memory and one for data memory, how can I do now? Recompile my hardware design?  thanks  sun zhigang

[Altera_Forum]

If you compile your software first, you will have the .hex files populated with the onchip data (it's one of the last steps of the compile). You have to target the compiler to use that memory however and also have your system boot from the onchip memory location (that setting is in SOPC Builder). Then when you do a Quartus compile they become apart of the hardware (just like mif files). One thing to keep in mind is the onchip memory types you pick. Some allow for pre-initialized RAM to be created and some do not. I recommend having an onchip ROM memory for sections that do not change (like the program code section for example), then the rest uses onchip RAM.