interrupt of the Nios II

[dsun01]

Dear Support, 

I have a simple question about the Nios II interrupt, I got a pretty old project, need upgrade it function. while I am update it to the Quartus 21.3. when I build Nios  II project, there are complains that 

---------------------

C:\FPGA\arria10devkit\jesd204b_copy4\ip\software\nios2_jesd_reconfig_bsp/alt_sys_init.c:94: warning: Error: Interrupt not connected for timer. The system clock driver requires an interrupt to be connected. Please select an IRQ for this device in SOPC builder.

---------------------

I notice that all 3 modules irq signals were exported.

nios ii has irq0 to irq 31,  timer.irq and uart.irq

after I make all of them internal, and connected the timer.irq, uart.irq to nios2.irq. regenerate everything, it will compile without any issue. 

here is my question. 

if I connected uart irq and timer irq to the nios II irq. I have to disable the export. how to split the Nios ii irq, for example, make 16 of them internal, and 16 of it exported. 

it should be somewhere in the handbooks, hope nios ii expert spend few minutes give me some instruction. 

Best Regards,

David

[KennyTan_Altera]

Hi, Kindly expect some late reply as the owner is taking some leave until next week.

[EBERLAZARE_I_Intel]

Hi,

Unfortunately, it is not recommended to have connections to be exported outside of Platform Designer, as the behavior can be uncertain.

I believe you are looking for something similar which would be the EIC (external interrupt controller)? :

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/nios2/n2cpu_nii5v1_01.pdf#page=80

[EBERLAZARE_I_Intel]

Hi,

Do you have any follow up questions?

[dsun01]

Hi, 

After read the manual and some struggle, it worked, thank you for the following up. 

David