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"How to Connect 'Interrupt Sender' to Avalon Address in Platform Designer (Quartus Prime Pro)?"

fa_fpga_enthusiast
Neuer Beitragender I
1.729Aufrufe

Hello,

I have a question about connecting a custom "Interrupt Sender" to an Avalon address in Platform Designer.

I’ve attached two images to this message. One shows the platform design in Quartus Prime Pro 23.4, and the other corresponds to Qsys in Quartus || 13.1. Qsys has a parameter called "Associated addressable interface" for an "Interrupt Sender". However, this parameter is no longer available in Platform Designer in Quartus Prime Pro. Instead, I only see the parameters "Bridged receiver offset" and "Bridges to receiver."

Currently, I am using the IRQ number shown in Platform Designer and hardcoding it into my embedded software. However, I want to connect the interrupt to an Avalon address to have a corresponding parameter automatically generated in system.h in the BSP. This would allow me to avoid using hardcoded values for the IRQ.
In Quartus || 13.1, I could assign the "Associated addressable interface" to achieve this, but I cannot find an equivalent way to do so in Quartus Prime Pro.

What is the recommended solution for this in Quartus Prime Pro?

Thank you in advance for your guidance!

0 Kudos
10 Antworten
RichardTanSY_Altera
1.663Aufrufe

Hi,


I checked and unfortunately this parameter has been deprecated in Quartus Pro beginning with Quartus Pro 17.0.

You will need to familiarize yourself with the latest custom component and implement it according to your design needs.


Regards,

Richard Tan


fa_fpga_enthusiast
Neuer Beitragender I
1.643Aufrufe

Thank you for your reply.

How can we avoid hard-coding the IRQ number for our custom interrupt request in the embedded software using Quartus Prime Pro 23.4? Ideally, we want to link this interrupt request to a parameter in 'system.h'. Since the IRQ number assigned by the Platform Designer changes with modifications, we need the embedded software to automatically reflect these changes from 'system.h', rather than manually updating the IRQ number in the code.

JingyangTeh_Altera
Mitarbeiter
1.571Aufrufe

Hi

 

For the interrupt number and controller it is defined in the system.h file.

In the system.h under the interested IP the define for the interrupt number and controller number is defined there.

E.g. the interruptcontroller number and the number for the mSGDMA is define below.

 

2025-01-14_10h34_07.png

Instead of hardcoding it, you could use the define int he system.h

Whenever you regenerate the BSP the system.h will be updated.

 

Regards

Jingyang, Teh

 

fa_fpga_enthusiast
Neuer Beitragender I
1.544Aufrufe

Hello,

Thank you for the reply.

Did you read the earlier messages?
We are talking about the "Interrupt Request" from a custom HDL module added to the Platform Designer. In earlier versions of Quartus, we could use the "Associated addressable interface" parameter to connect the custom "interrupt sender" to an interface and create a relevant parameter in "system.h," but it seems that this feature has been removed.
The solution that you mentioned only works with the "Intel IP Cores", and we are already familiar with this.

JingyangTeh_Altera
Mitarbeiter
1.456Aufrufe

Hi


It seems like this could be an issue on the generation of the system.h macro.

For a custom IP there would be define generated in the system.h too.

Let us sort out this issue , but at the meantime is the interrupt number working if you hardcode the values in your code?


Regards

Jingyang, Teh


fa_fpga_enthusiast
Neuer Beitragender I
1.438Aufrufe

Hello,

 

Thank you for your response!

 

We couldn't locate a parameter corresponding to the "Interrupt Request" of our "Custom HDL Module" in the system.h file generated by the Platform Designer. Currently, if we use the "IRQ Number" assigned to this interrupt in the Platform Designer as a hard-coded value in our embedded software code, it works without any issues.

However, we would prefer a more flexible solution by associating a parameter in system.h with this interrupt. This approach would avoid manually updating the hard-coded value if we modify the Platform Designer in the future.

As mentioned earlier, in previous versions of Quartus software, we could achieve this using the "Associated addressable Interface" feature, which is unfortunately no longer available in Quartus Prime Pro.

 

Best regards.

JingyangTeh_Altera
Mitarbeiter
1.323Aufrufe

Hi


Thanks for the confirmation that hardcoding value in code is working.

This issue is acknowledge by our team.

However they are currently looking into this and did not mention which version of Quartus this will be fixed.


Regards

Jingyang, Teh


JingyangTeh_Altera
Mitarbeiter
1.248Aufrufe

Hi


If it is okay with you we will proceed to close this case.

Our technical team have yet to provide a targeted Quartus fixed version.

The issue number for the case for internal tracking is 15017381908.

At the meantime please use the hardcoded value for the time.


Regards

Jingyang, Teh


fa_fpga_enthusiast
Neuer Beitragender I
1.223Aufrufe

Hello,

 

Thank you for your response!

We confirm that it is fine to close this case. We look forward to the fix in a future version of Quartus.

 

Best regards.

JingyangTeh_Altera
Mitarbeiter
1.158Aufrufe

Hi


I’m glad that your question has been addressed, I will now transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com/s/?language=en_US’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.


Regards

Jingyang, Teh


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