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"Open" solution for ethernet connection

Altera_Forum
Honored Contributor II
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Good afternoon, 

In a new project I want to use ethernet to connect FPGA to PC, just sockets (only send and receive data). I have been locking at forums, Altera documentation and other info to know the best "open" solution. After all I have two possibilities: 

-RTOS uCLinux 

-LwIP v.1.3.1 in standalone mode 

 

In a first moment I tried the uCLinux, but after one week trying to install all the software needed to work in Linux I understood that it's more complex that I need. 

 

Now I'm looking for the second solution, but seems that two years ago Altera changes LwIP stack to InterNiche (a Non-open Stack). I have found the docuemtation and data for generic implementation of LwIP, but I have not found any example of implementation for NIOS II (but it seems to exists for old versions of NIOS). 

 

Could some one say me where can I find these examples, or send it to me? 

There is another simple solution to implement sockets in NIOS II? 

 

Thank you for your support. 

 

Isaac Campos
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