Nios® V/II Embedded Design Suite (EDS)
Support for Embedded Development Tools, Processors (SoCs and Nios® V/II processor), Embedded Development Suites (EDSs), Boot and Configuration, Operating Systems, C and C++
12622 Discussions

reset manager status register values after power up

Altera_Forum
Honored Contributor II
1,056 Views

Running baremetal application with preloader from EDS 15 

 

According to cyclone v handbook page 3-17, register stat of reset manager keeps information about 

cause of reset. 

 

I am trying to read this register after warm reset, cold reset or watchdog reset.  

Expect to have 

bit swcoldrst is 1 while cold reset caused by software 

bit mpuwd0rst is 1 while watchdog reset 

 

In reality, i got all 0. Altera's support suspects preloader to reset status register. 

Need help to find this in preloader.
0 Kudos
1 Reply
Altera_Forum
Honored Contributor II
392 Views

I think these registers are not set at first power on. I think they start out at zero. If it is being reset in the preloader, you can find out by adding code to look for changes. Put in code at the very beginning to save the value(s) you are interested in. You can't print yet because I/O isn't initialized. Look for the code that produces the first visible printf. Print the value(s) read at power on there to see what it was.

0 Kudos
Reply