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verify failed in DMA

Altera_Forum
Honored Contributor II
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Hi all: 

Recently, I ws debugging the function of DMA module. In the Sopc Builder, the read-master linked with SDRAM and the write-master linked with on_chip_memory. In addition, one CFI_Flash which used to store program in the Sopc Builder too. But the console window always told me that verify failed between address 0x0 and 0x213B. I have initiated the flash memory with flash programmer, and the memory between 0x0 and 0x10000 was 0xFF. But the work did not make sense。 

Is there anyone who knows it and help me? 

Thank you very much! 

William
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Altera_Forum
Honored Contributor II
654 Views

Hi gowilliam 

 

Verify wether the correct ptf(generated by sopc) file is given to niosII ide  

 

check in sytem library properties 

 

if verify failed error came and you are not able to port into nios processor than i think its a ptf file mismatch only 

 

regards 

M Kalyansrinivas
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Altera_Forum
Honored Contributor II
654 Views

Thank you very much! I am very sure that the ptf file is given to the Nios II IDE. I have a question. Would it be possible to load the program with flash memory. Because I tried to make it in other project, and it appeared the same problem. If I use the SDRAM memory to load program, then it is OK. So, what is the problem?

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Altera_Forum
Honored Contributor II
654 Views

Hi  

I have not tried of placing the exception vector in flash memory 

 

I always keep the exception vector in SDRAM only and reset vector in flash 

memory  

 

I think it should not give problem as it is also a memory but not sure  

 

regards 

M Kalyansrinivas
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Altera_Forum
Honored Contributor II
654 Views

Thank you for your help! In my project, there are only on_chip_memory and cfi_flash for reset vector and exception vector, though there are SDRAM controller in the project. I do not know why. Have you ever encounted the problem?

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Altera_Forum
Honored Contributor II
654 Views

 

--- Quote Start ---  

Thank you for your help! In my project, there are only on_chip_memory and cfi_flash for reset vector and exception vector, though there are SDRAM controller in the project. I do not know why. Have you ever encounted the problem? 

--- Quote End ---  

 

 

maybe you can try setting the reset vector on "on_chip_memory

and the exception vector on "cfi_flash"
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