For BayTrail_I processor, do we need reserve any external component for pin No. P7, P6, H5 and H4?
The description of these pins on PDG are all 'reserved' but P/U and P/D on CRB(document No. 523921) for USB3 ICLK usage.
Please help to confirm the design for these pins.@
thanks for help.
Wade, I checked my inbox but I do not see your reply. Login to the community and check your PMs there, if you find my message just reply in there. Just in case, I will re-send the message.