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In our design we are using Tiger Lake UP3 processor, for SI Simulation kindly let us know which model need to use for PCIE GEN3 Interface whether 611782_TGL_PCH-LP_GPIO_BUFFER_MODEL_Rev0p9 or 612234-tgl-processor-highspeedinterface-spicemodels-rev1-0.

KMANO3
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AdrianM_Intel
Employee
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Hello KMANO3,

 

Thank you for posting on the Intel® communities.  

 

  • Are you developing a hardware/software?
  • What is the model of your processor?
  • Could you please provide us more details about it?

 

Regards,

 

Adrian M.

Intel Customer Support Technician

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KMANO3
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Hi Support Team,

Please find the details,

  • We are developing a Hardware
  • Using TGL_UP3 Processor
  • For PCIE_GEN3 SI Simulation , Please confirm us , Could we use 612234-tgl-processor-highspeedinterface-spicemodels-rev1-0, which consists of CPU_PCIE buffer and Package model. Since in 611782_TGL_PCH-LP_GPIO_BUFFER_MODEL_Rev0p9 which consists of TGL_PCH_MODPHY_USB3p1gen1_PCIE_SATA_MODELS and in some of the necessary files which mentioned in the .sp file are missing.
  • If you required any further details, Please let us know.
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AdrianM_Intel
Employee
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Hello KMANO3,

 

Thank you for your response.

 

To better assist you, we recommend that you submit your question on the Intel® Developer Zone.

 

You can also contact Intel® Resource & Design Center

(Technical Resources for Designers, Engineers, and Developers).

 

Regards,

 

Adrian M.

Intel Customer Support Technician

 

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