N3350 SMBus write access

[okuda]

I am using a motherboard that uses N3350.
The board will support SMBUS I / F.
Since the OS uses Linux and the Intel driver cannot be used, the i2c-i801 Linux driver is used.
Byte reading of the slave device can be performed without any problem using the driver.
When byte write is executed on the slave device, it becomes DEV_ERR.
The following is a debug message for read / write.

１．i2cget -y 0 0x0a 0x00 <--- Linux command to read bytes from address 0x00 of slave address 0x0a with bus number 0
Debug message when executing(Bus number 0 is SMBUS)
[ 64.177372] i2cdev_open Start
[ 64.177389] i2cdev_open name i2c-dev 0
[ 64.177401] i2cdev_ioctl Start
[ 64.177406] i2cdev_ioctl Start
[ 64.177417] i2cdev_ioctl Start
[ 64.177421] i2cdev_ioctl_smbus Start
[ 64.177424] i2cdev_ioctl_smbus Call i2c_smbus_xfer 2
[ 64.177428] i2c_smbus_xfer Start
[ 64.177432] __i2c_smbus_xfer Start
[ 64.177435] i801_access Start
[ 64.177535] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTADD : 0xf044 value : 0x15<---1-bit left shift of slave address 0x0A + readwritebit:1
[ 64.177551] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTCMD : 0xf043 value : 0x00<---Access address
[ 64.177564] i801_access I2C_SMBUS_BYTE_DATA xact : 0x08
[ 64.177595] i801_transaction outp SMBHSTCNT : 0xf042 value : 0x48<---Byte Data:010 + Start
[ 64.178334] i801_wait_intr status : 0x00000042
[ 64.178351] i801_transaction i801_check_post 2 : 0x00000000 0x00000002
[ 64.178353] i801_access no block ret : 0x00000000
[ 64.178370] i801_access ret : 0x00000000
[ 64.178383] i2cdev_release Start

２．i2cset -y 0 0x0a 0x02 0x00 <--- Linux command to byte write 0x00 to address 0x02 of slave address 0x0a with bus number 0
Debug message when executing(Bus number 0 is SMBUS)
[ 398.069012] i2cdev_open Start
[ 398.069023] i2cdev_open name i2c-dev 0
[ 398.069031] i2cdev_ioctl Start
[ 398.069033] i2cdev_ioctl Start
[ 398.069039] i2cdev_ioctl Start
[ 398.069040] i2cdev_ioctl_smbus Start
[ 398.069042] i2cdev_ioctl_smbus Call i2c_smbus_xfer 2
[ 398.069043] i2c_smbus_xfer Start
[ 398.069045] __i2c_smbus_xfer Start
[ 398.069046] i801_access Start
[ 398.069122] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTADD : 0xf044 value : 0x14<---1-bit left shift of slave address 0x0A + readwritebit:0
[ 398.069132] i801_access I2C_SMBUS_BYTE_DATA outp SMBHSTCMD : 0xf043 value : 0x02<---Access address
[ 398.069140] i801_access I2C_SMBUS_BYTE_DATA(I2C_SMBUS_WRITE) outp SMBHSTDAT0 : 0xf045 value : 0x00<---Write Data
[ 398.069148] i801_access I2C_SMBUS_BYTE_DATA xact : 0x08
[ 398.069173] i801_transaction outp SMBHSTCNT : 0xf042 value : 0x48<---Byte Data:010 + Start
[ 398.069903] i801_wait_intr status : 0x00000044<---DEV_ERRbit:1
[ 398.069922] i801_check_post ENXIO
[ 398.069931] i801_transaction i801_check_post 2 : 0xfffffffa 0x00000004
[ 398.069933] i801_access no block ret : 0xfffffffa
[ 398.069949] i801_access ret : 0xfffffffa
[ 398.070040] i2cdev_release Start

How do I set the SMBUS register to successfully write access to a slave device using the SMBUS interface?

[AndrewG_Intel]

Hello @okuda

Thank you for posting on the Intel® communities.

We found another thread describing the same issue/inquiries and the same hardware/software environment as this one. To avoid duplication of effort, we will close this thread and we will continue working on this one: "INTEL N3350 SMBUS(Linux)"

Thank you for your understanding.

Best regards,

Andrew G.

Intel Customer Support Technician