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ソフトエラーにつきまして MAX10シリーズは中性子線によるソフトエラーを回避する手段を有していますでしょうか。

JunH
Beginner
360 Views

下記URLではMAX10について言及していませんが、MAX10はどのようになっていますか。

https://www.intel.co.jp/content/www/jp/ja/programmable/products/fpga/features/stx-single-event-upset...

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ChiaLing_T_Intel
Employee
131 Views

Hi JunH,

 

Thank you for contacting Intel Community. For your information, Intel Max 10 devices consists of an error detection cyclic redundancy check (EDCRC) feature. You can use this feature to mitigate single-event upset (SEU) or soft errors. For details, kindly refer to Intel Max 10 FPGA configuration design guidelines, Section 3.6 - Error Detection:

https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/hb/max-10/ug_m10_config.pdf

 

Thank you

 

Regards,

Chia Ling

 

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