- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
I would like to interface a Cyclone IV FPGA with a component that uses 1.3V-LVCMOS. However, the FPGA IO standards are either 1.2V or 1.5V. Is it possible to connect the Vccio pins to 1.3V? If it's possible, should I set the IO standard in the Quartus software to 1.2V or 1.5V?
Thanks for your support.Link Copied
3 Replies
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- I would like to interface a Cyclone IV FPGA with a component that uses 1.3V-LVCMOS. However, the FPGA IO standards are either 1.2V or 1.5V. Is it possible to connect the Vccio pins to 1.3V? If it's possible, should I set the IO standard in the Quartus software to 1.2V or 1.5V? Thanks for your support. --- Quote End --- Look at the compatibility of the interfaces: 1) Does FPGA output Vol(max) and Voh(min) meet the input requirement of the external 1.3V logic device. 2) Does the 1.3V device output Vol(max) and Voh(min) meet the input requirement of the FPGA device. 3) Do any voltages violate the maximum input voltage of either device. Chances are the 1.2V FPGA standard will work fine (the FPGA pins could handle 1.3V input from the external device). Don't forget that setting the voltage in Quartus is not sufficient, the board itself has to actually have a VCCIO voltage of 1.2V :) Cheers, Dave
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Thanks a lot for your answer. However, I would like to avoid having 1.2V and 1.3V voltage regulators. The device core runs on 1.0V, so I don't need 1.2V for anything else. Therefore my question is if I can use 1.3V as Vccio for the FPGA.
The datasheet specifies the Vccio recommended operation conditions for the 1.2V standard as 1.14V (min) and 1.26V (max). For the 1.5V standard, it is 1.425 (min) and 1.575 (max). But I guess these specs are only to guarantee compatibility with the JESD8 1.2V-LVCMOS and 1.5V-LVCMOS standards. I can't imagine a Vccio between 1.26V and 1.425V would reduce the performance or even damage the device. But I can't find any information on this topic. I hope this makes my question more clear. Thanks in advance for your help.- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
--- Quote Start --- Therefore my question is if I can use 1.3V as Vccio for the FPGA. --- Quote End --- You'll need to file a Service Request with Altera's official support channel to get an official answer to this. If you have a development board where you can control the VCCIO of a bank, eg., the DE115, then try using VCCIO = 1.3V and see what happens. I can't think of any reason it would not work. You could then try lying to Quartus that VCCIO is 1.2V and then 1.5V and see if any difference is observed. The data sheet can't have a guarantee for a continuous range of voltages, so it likely just contains the 'standard' voltages. The alternative is to use an officially supported voltage on VCCIO and use an external dual-supply-rail device. Texas Instruments has several. You'd just need to find a TI device with a 1.3V specification. Cheers, Dave

Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page