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10MxxDAF484 Different voltage on VCCIO1A/B and VREF_ADC pin

lutzek
New Contributor I
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Hello,

I am using dual supply device with ADC (10M50DAF484I7G). In my design I initially connected ADC_VREF pin to 2.5V and VCCIO1A/VCCIO1B (so also JTAG connector) to 3.3V. I'm not sure if this is allowed. Here are my considerations:

 

"Intel® MAX® 10 FPGA Configuration User Guide" section 3.2.3 "JTAG Configuration Setup" clearly states that JTAG pull-up resistors and pin 4 on JTAG connector should be connected to VCCIO bank 1B (or bank 1 in 10M02).

 

lutzek_0-1714216942530.png

 

 

In addition there is no restriction for voltage on VCCIO Bank 1A and 1B in "Intel® MAX® 10 FPGA Device Family Pin Connection Guidelines" other than 1.0V is not supported. So it can be connected to 3.3V.

 

BUT (!)

 

The same documents states:

- "If the VREF pin is used, you must connect the VCCIO1A and VCCIO1B pins to the same voltage level." (See Table 7, VCCIO[#]).

- And also in Table 6, section ADC_VREF: "Tie the ADC_VREF pin to an external accurate voltage reference source. If you are not using the external reference, this pin is a no connect (NC)."

 

And there is a spec in "Intel® MAX® 10 Analog to Digital Converter User Guide", section 5.1, that voltage on external ADC reference requirement is: "Dual supply devices: up to 2.5 V"

lutzek_1-1714216942877.png

 

 

Please correct me if I'm wrong:

There  are following recommended solutions:

  • If ADC is used, and we want to use external reference then ADC_VREF, VCCIO_1A, VCCIO_1B should be connected to 2.5V and that implies that pull-ups and programmer connector pin 4 should also be connected to 2.5V. 
  • If ADC is used and we don't want to use external reference then ADC_VREF should be not connected and VCCIO_1A and VCCIO_1B still must be connected to 2.5V, because Internal reference is supplied from VCCA, that (per datasheet) should be connected to 2.5V.
  • If ADC is NOT used, then VCCIO_1A and VCCIO_1B, so also pull-ups and programmer connector pin 4 can be connected to 3.3V, but VREF should be not connected (NC).
  • Connecting VCCIO_1B to 3.3V and ADC_VREF to 2.5V in dual supply devices is not recommended or even forbidden.
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AqidAyman_Intel
Employee
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If you do not enable the ADC feature, you may connect VCCIO1A and VCCIO1B pins to different voltage levels, provided that the VREF pin is not used. If the VREF pin is used, you must connect the VCCIO1A and VCCIO1B pins to the same voltage level.


If you enable the ADC feature, connect VCCIO1A and VCCIO1B to 2.5V.


This is what I got from Pin Connection Guidelines for Max 10 (Dual Supply).

It checks all your recommended solutions.


Regards,

Aqid


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4 Replies
AqidAyman_Intel
Employee
421 Views

If you do not enable the ADC feature, you may connect VCCIO1A and VCCIO1B pins to different voltage levels, provided that the VREF pin is not used. If the VREF pin is used, you must connect the VCCIO1A and VCCIO1B pins to the same voltage level.


If you enable the ADC feature, connect VCCIO1A and VCCIO1B to 2.5V.


This is what I got from Pin Connection Guidelines for Max 10 (Dual Supply).

It checks all your recommended solutions.


Regards,

Aqid


lutzek
New Contributor I
396 Views

@AqidAyman_Intel , thank you for claification and support - this dispels all doubts.

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AqidAyman_Intel
Employee
343 Views

I’m glad that your question has been addressed, can you confirm if you need more support on this?


If no, I will transition this thread to community support. If you have a new question, Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you.


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lutzek
New Contributor I
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Hello @AqidAyman_Intel , I don't need more support in this case.

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