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3.3V VCCIO for Emulated LVDS (Max V)

Altera_Forum
Honored Contributor II
‎07-25-2014 11:17 PM
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I understand how the three resistor termination works to emulate LVDS with the MAX V and other devices that do not have true LVDS. 

 

All of the examples seem to imply that the IO supply needs to be 2.5V. Is there any reason that the I/O supply can't be 3.3V with obvious recalculation of the termination resistors? If recalculation is OK, what is a good value for Zout of the drivers (20 ohms?). I didn't see anything in the datasheet. 

 

Why is 2.5V the preferred choice since most standalone LVDS devices routinely operate with 3.3V supplies? 

 

I can certainly add a regulator but my board only needs two LVDS outputs and it would be more convenient to just use 3.3V for all my I/O. 

 

Thx
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Altera_Forum
Honored Contributor II
‎07-26-2014 12:28 PM
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The common mode voltage of 3.3V supplied LVDS_E_3R is oustside the LVDS specification, but it would be tolerated by most LVDS receivers. Ultimately you'll add bias resistors to achieve the specified 1.125 V to 1.375 V output common mode voltage. 

 

20 ohm is a good guess for driver output resistance. For an exact specification of output characteristic and expectable type variation, refer to to MAX V Ibis files.
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