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You can generate a 32-bit memory with byte access using Megafunctions.
I like to write Verilog code that Quartus recognizes as a standard megafunction. Quartus has a variety of Verilog examples for memory, but not one for memory with byte access. Just for my own satisifaction I would like to find Verilog source that Quartus would recognize as memory with byte-access.Link Copied
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See the coding guidelines for Q11.1
You need to use SystemVerilog for infered RAMs with byte enable access http://www.altera.com/literature/hb/qts/qts_qii51007.pdf Page 11-30- Mark as New
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that looks like what I wanted to know - now to try it!

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