6.25Gbps transeiver synchronization problem

[Altera_Forum]

I'm using eight 6.25Gbps transceiver channels of Stratix II GX device and found that that the channels cannot be synchronized. I need all channels phase locked as precise as possible, saying channel difference/skew should be kept within several pico-seconds, but during measurement I found that the channels are totally independent with each other. And channel-to-channel skew may change randomly at each power up process , while after power-up the skew will be fixed. 

 I think the problem is due to that each channel utilize its own PLL and there's no automatic calibration module or phase lock among these PLLs. I wonder if any other device could solve this problem. Please advise.  thanks!

[Altera_Forum]

--- Quote Start ---  I need all channels phase locked as precise as possible, saying channel difference/skew should be kept within several pico-seconds  --- Quote End ---   This a very difficult requirement. In the end at the output of each receiver has a 6.4 ns clock. Even if you carefully align all incoming streams,e.g. by feeding them from another FPGA using the same reference clock, you still risk having one clock of difference between the RX outputs.     --- Quote Start ---  I think the problem is due to that each channel utilize its own PLL and there's no automatic calibration module or phase lock among these PLLs  --- Quote End ---   Each receiver locks to the incoming stream and needs to be self-supporting and thus to have its own PLL.