ADC Demultiplexing and DC offset removal

[Altera_Forum]

Hi, 

 I am new to ADC/DSP design. I am currently working on an Altera FPGA design which has an ADC interface with the following requirements:  -------------------------------------------------------- Gives a 2's complement value Digital output to the FPGA. Since this is a dual channel ADC, I need to demultiplex this at the FPGA into two separate digital data streams. My interface has to demultiplex and then do the DC offset removal. ---------------------------------------------------------  Can some one explain me  

1. why I need to do the DC offset removal 
2. how to do that in Digital domain (FPGA)?

 My understanding is 

1. I need to do the DC offset removal as the ADC output (2's compliment is a signed value) and hence need to remove the DC offset value and convert into unsigned values. 
2. How to do the DC offset removal is to use a high pass filter (so that all the low frequency components-DC equivalent) will be removed?But what should be the specifications for this high pass filter?

Your concept,thoughts/ideas on this will be greatly helpful.  BPR

[Altera_Forum]

I don't know about your ADCs but I can say this: 

 DC offset: ADCs must remove DC but most ADCs have some dc offset. It is common practice to remove dc so that you process the actual signal fluctuations efficiently. dc does not convey information and will waste resolution resources.   Notice that unsigned implies heavy dc as all values become positive. So to remove dc you must deal with signed values.   DeMultiplexing makes sense if your input is one channel but interleaved.   removing dc: if your signal has energy near dc then it is difficult to use a traditional HPF to remove dc sharply. I have used an accummulator(just a feedback adder) to average thousands of samples e.g. 1024 samples then just chop off 10 LSBs and you got the their average ready to subtract. This mean computation is not running average filter but "segmented 1024 taps". You can make it running if you have spare 1024 x datawidth registers. This is really not needed since you can just subtract the current mean from next set of input.

[Altera_Forum]

Hi Kaz, 

 Thanks for your detailed explanation. I realised that since I have signed numbers(2's complement), and hence no need to convert to unsigned.  Cheers BPR

[Altera_Forum]

doesnot even having signed values after the ADc still required DC removal, because having signed values does not confirms that no DC offset ahs been added. 

 By the way: can someone explain why this DC offset is added to by the ADCs?   Thankx