Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
Announcements
FPGA community forums and blogs on community.intel.com are migrating to the new Altera Community and are read-only. For urgent support needs during this transition, please visit the FPGA Design Resources page or contact an Altera Authorized Distributor.
21615 Discussions

AN502 SMBUS protocol - help needed!

Altera_Forum
Honored Contributor II
1,138 Views

Hi, 

Did anybody tried using the AN502 design example of SMBUS? 

I'm having huge problems understanding it... 

I have 2 masters so I'm using the arbitration mode of this design, and I can't figure out what is the 'address register' means. 

Is it the address of the core (controller) itself or the address of the slave I'm talking with? 

Their explanations are pretty vague and confusing... 

Help needed! 

Thanks!
0 Kudos
0 Replies
Reply