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I have some questions about conventional AS config and SFL config.
I have one connector for jtag access, and one connector for AS config. My config device is an epcs4. I think it's very laborious in series production to connect the first connector to flash the epcs4 and switch to the next one to flash the flash ram. Now I'm trying to juse the SFL config. My Q: Is the hardware connection the same like AS config? How I have to connect the pins of the SFL symbol with the fpga pins on my Quartus II design? In AN370 Altera describes DCLK, NCSO and ASDO as input pins. It seems that this PlugIn is a virtuell EPCS device. I'm really confused about that, I hope you can help me.Link Copied
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--- Quote Start --- Is the hardware connection the same like AS config? --- Quote End --- Yes --- Quote Start --- How I have to connect the pins of the SFL symbol with the fpga pins on my Quartus II design? --- Quote End --- For basic SFL functionality, only noe_in has to be connected (to GND to enable SFL access to the AS device).
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The share asmi interface option should be disabled, so noe_in is the only pin in the symbol.
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Yap, it work's, thank's for your help FvM...
Best regards from Munich.- Mark as New
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I have ASMI block in my design.In this case,how do I connect other pins?
Isee following errors when I disable Share ASMI interface option. Error: Pins ALTERA_DCLK both have the SPI-related DCLK Pin assignment, but only one pin can have this assignment Error: Pins ALTERA_SCE both have the SPI-related SCE Pin assignment, but only one pin can have this assignment Error: Pins ALTERA_SDO both have the SPI-related SDO Pin assignment, but only one pin can have this assignment Error: Pins ALTERA_DATA0 and ALTERA_DATA0 both have the SPI-related Data[0] Pin assignment, but only one pin can have this assignment
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