Arria 10 10AX016E4 device no longer detected by JTAG Scan, wont load program, can't reprogram

[KBrit1]

I was able to use my USB Blaster in JTAG mode to program my A10 board. Once it was successfully Programmed and Verified, I cycled power to had the A10 load its configuration. It did not load, and now my USB Blaster sill not ever recognize a device is present. The Blaster does recognize other identical boards, but not this one. I have 5 out of 20 boards that wont load there program, the rest are working fine. On the boards that are not working, the CONF_DONE done Pin stays at a Zero instead going to 1.8V, and the nSTATUS pin sits at ~1V instead of 1.8V. What could be wrong. Are the A10's Dead?

[YuanLi_S_Intel]

Hi Ken, CONF_DONE pin stays LOW means that the board is having configuration error. Can you try to load a SOF file and see if it works? Regards, YL

[KBrit1]

Hello YL,

Unfortunately no I cannot program with a SOF. After a board is programmed the first time, it is no longer recognized by the JTAG programmer. I have attached screen shots of the JTAG signals on both a good and bad board.

I ran some more tests here is a summary of my results:

1. Program boards with JIC (Only tried this with two boards the next day… they both hung after programming, 7 boards failed the day before, 4 of one type and three of another, unfortunately I programmed them all before testing them so I did not know there was a problem until after they were programmed)
   1. Device programmed, "verify" CRC check was successful
   2. Cycle Power: Board Hung
   3. JTAG no longer recognizes FPGA, no device found
   4. Since JTAG not recognizing board, cannot program with SOF or JIC

(Is there a way to get FPGA to not try and boot from mem device, so I can check SOF/JIC sequencing)

1. Program the rest of my boards
   1. Initial Power ON, Program boards with SOF: Board works, functions working
   2. Cycle Power, Program boards with SOF: Board works jtag still recognizes A10 after power cycle)
   3. Without power cycle, while programmed with SOF: Program boards with JIC while it is programmed with SOF, board works

It could be a coincidence… did my last group of board’s not have the problem as the middle set. The boards were randomly chosen out of the box. The first two on this da, I programmed direct with JIC and they are now hung.

Is it possible that something could be wrong with the memory devices on the boards that were?

1. The prototype runs of these boards used the EPCQL256 memory device.
2. The boards that are failing have the MT25QU256ABA8E12-1SIT replacement memory
   1. First 1/3 of the batch of boards were programmed with JIC and were fine, several weeks ago and have been in functional verification.
   2. Second 1/3 of this batch of boards were programmed with JIC and are now all hung, no longer recognizable by usb blaster(terasic)(not new usb blaster 2 but old usb blaster)
   3. Last 1/3 of this batch of boards were programmed with SOF and then JIC and they are fine

Fundamentally it would be nice to know if a corrupted memory device could make the FPGA no longer recognizable to JTAG or any other reason that I can check.

Does programming an fpga the first time change how it powers up and could prevent the JTAG from recognizing the device.

My next steps are to have the A10's and / or the Memory devices replaced. Do you think just replacing the memory device first might work?

Regards,

Ken

[KBrit1]

For the screen shots here are the signal names:

CH1: TCLK

CH2: TDO (goes low with TDI/TMS right away in not detectable board)

CH3: TMS

CH4: TDI

[YuanLi_S_Intel]

Hi Ken, Based on your explanation, are you saying that you apply the same JIC into the development kit, first and last 1/3 batch is working fine but not 2nd 1/3 batch? Please clarify. Also, may i know how many pieces of development kit is having problem on the second 1/3 batch? If some unit is having this issue, it might be caused by development kit problem and you can apply RMA for that. Regards, YL

[KBrit1]

Hello YL,

To clarify, my problems are not with a Intel Development Kit. I have two of my own custom board designs board A and board B. I built 20 of each of these boards.

• I programmed 1/3 of each of these boards directly using the JIC file. Tested the boards for several weeks, and everything was fine.
• Then one day.... I was programming the second third of each batch and the programmer window messages said they programmed successfully. However when I cycled power the boards never loaded their programs, and could no longer be recognized by the programmer to attempt to reprogram them.
• The next day, I programmed a boards with the SOF file first.... verified the board was working correctly.... then with the SOF file still running... programmed the board with the JIC file... cycled power and the board works fine. One at a time I programmed all the remaining boards with the SOF then JIC sequence and they are all fine.
• I have 9 boards that are still dead from the direct JIC load. I have sent them back to the assembler to have the memory devices replaced. I will attempt to see if my new process works on these boards with new memory devices. If that does not work I will replace the FPGA's and try again.

I would like to know:

• can a corrupt memory device cause the FPGA to no longer be recognized by the JTAG interface, is the A10 trying to load the program in the meme device and getting stuck?
• what can cause an A10 that was recognizable by the JTAG interface, to no longer be recognizable after it is programmed?
• is there a way to power up the A10 so it does not try and load from memory?
• could the Terasic version of the USB Blaster cause this problem?

Any help you can provide would be appreciated

[YuanLi_S_Intel]

Hi Ken, Please find my response below: [1] can a corrupt memory device cause the FPGA to no longer be recognized by the JTAG interface, is the A10 trying to load the program in the meme device and getting stuck? No it wont be. As long as the FPGA is able to power on, it can be detected. Failed to configure the FPGA during power on doesn't stop Quartus from recognizing the device. [2] what can cause an A10 that was recognizable by the JTAG interface, to no longer be recognizable after it is programmed? It can either be the configuration pin is shorted to VCC or ground on the board or the FPGA cannot be powered on. [3] could the Terasic version of the USB Blaster cause this problem? I dont think so, since USB blaster is only used to program the programming file into FPGA. Configuration of FPGA doesnt utilize USB Blaster. Can you check the configuration pin? Is there any problem on the failure board? Regards, YL