Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
20834 Discussions

Arria 10 Variable Precision DSP Blocks Floating Point Exception Handling

FvM
Valued Contributor III
133 Views

Hi,
Arria 10 documents seem not to specify behaviour of DSP Blocks in floating point modes with infinity or NaN input. In contrast, Stratix 10 DSP exception behaviour is specified in detail in "Variable Precision DSP Blocks User Guide".

A possible guess is that DSP block has the same behaviour as FP IP (see Floating-Point IP Cores User Guide, paragraph 1.5) "Input support for not-a-number (NaN), infinity, zero, and normal numbers". ModelSim simulation also suggests that DSP block is processing inf input as expected.

 

Please clarify.

Regards
Frank

Labels (1)
0 Kudos
2 Replies
Shuo_Zhang
Employee
51 Views

The DSP on Arria® 10 devices do not support denormal number input, it does not contain any exception flag signals.


And the notification: "If the input is a denormal value, the IP core forces the value to zero and treats the value as a zero before going through any operation." under Floating-Point IP Cores User Guide - 1.5. Floating-Point IP Cores General Features is suitable for the Arria 10 devices, because this document is included in the Intel® Arria® 10 FPGAs Support Collection.


0 Kudos
FvM
Valued Contributor III
30 Views

Hi,
thanks for answering. I was specifically asking for propagation of NaN and +/-inf input to Arria FP DSP blocks. It's a valid assumption that hardware DSP implements the same behaviour as FP software IP, but in my view it's still a guess. The behaviour is clearly specified in respective DSP block user manual for other devices like Stratix 10, so why not for Arria 10?

I presume Intel support has more substantial sources to answer the question than conclusions.

 

Regards
Frank

0 Kudos
Reply