Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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Arria10 FPGA SERDES details

malayali
Beginner
560 Views

hello Team,

 

I am using Arria 10 FPGA my design. My application is USB (Host and device) and DP (Source and sink). I am using the Transceiver bank for the USB and DP interface and I have a few queries in it.

1. When FPGA is in DP Sink or USB Device [Receiver] mode will there be any common-mode voltage or bias voltage to the Multiplexer IC from [TMUXHS4412] since am MUX the USB and DP Signals via these mux to the USB - C Connector.

2. What is the common-mode voltage of the transceiver bank in Source and Sink USB or DP IP?

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Ash_R_Intel
Employee
515 Views

Hi,

As I understand, your query is about the common voltage specifications for the Arria 10 device. You can refer to the following datasheet link and select value based on your IO standard.

https://www.intel.com/content/www/us/en/docs/programmable/683771/current/differential-i-o-standards-specifications.html


Regards


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malayali
Beginner
499 Views

Sure, I'll check and get back to you.

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