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Avalon interface data width vs. external memory data width

Altera_Forum
Honored Contributor II
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Dear all, can I ask a question? 

 

We all know avalon interface are 32 bits, but most external memory are 8 bits or 16 bits,  

 

Where the extra bits go when DDR/DDR2 SDRAM HP controller write to the external memory? Which one happens in the following case? 

 

For a 32 bits local_wdata, the total 32 bits from HP controller are sent to the mem_dq bus 2 or 4 times, only the lower 16 bits/8 bits are selected by the memory? if so, how the memory know which one to select? 

 

or only the lower16 bits/8 bits selected by HP conroller and sent to mem_dq bus? 

 

 

Thank you very much!
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