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Hello,
Does Agilex 5 support CAUI‑4 input for implementing a 100G Ethernet receive path?
I’m working on a design where I intend to receive 100G Ethernet from a QSFP28 module, using 4 lanes at 25.78125 Gbps.
According to Intel documentation, Agilex 5 transceivers support:
up to 28.9 Gbps NRZ,
standard PCS (64b/66b),
and interfaces like XLPPI, XLAUI, etc.
However, CAUI‑4 is not explicitly mentioned in Agilex 5 documentation or IP catalog, while previous devices like Arria 10 do mention it directly.
I configured the GTS PMA/FEC Direct PHY IP with 4 × 25.78125 Gbps and enabled PCS (IEEE MII / PCS66). The IP compiles successfully in Quartus Pro 25.1, and simulation passes.
But it’s unclear whether this configuration is officially supported, or sufficient to receive and deserialize CAUI‑4 input from QSFP28.
Also, I encountered conflicting documentation:
One source says PCS is not supported above 17.16 Gbps.
Another states that "Ethernet mode: 4 × 10/25 GbE PCS direct mode (64b/66b hard IP)" is supported.
Here are my questions:
Can we implement CAUI‑4 reception manually using GTS PHY IP with PCS enabled?
Is there a soft MAC IP (even licensed) available that supports this 100G aggregation for Agilex 5?
Are there any Quartus 25.1 limitations for this mode we should be aware of?
Thank you in advance!
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Hi,
Similar to your query on CAUI-10, I think each lane is required to be working at 100Gbps as per the specification. This is not possible with GTS XCVRs as it can go only upto 28.1Gbps as per the datasheet.
Regards
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No, 4×25 G, review 100GBASE-LR4 spec in IEEE-802.3-2015 Clause 88 and Annex 83-D and 83-E about CAUI-4.
It's unlikely a typo, may be a feature not yet implemented in present Agilex 5 IP, we know there are others, too.
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Hi,
When you say 'One source says PCS is not supported above 17.16 Gbps' in your description, can you point us to the document which mentions this?
To answer your question,
Can we implement CAUI‑4 reception manually using GTS PHY IP with PCS enabled?
Ans -> Yes
Is there a soft MAC IP (even licensed) available that supports this 100G aggregation for Agilex 5?
Ans. -> There is no IP that supports 100G aggregation.
Are there any Quartus 25.1 limitations for this mode we should be aware of?
Ans. -> List of current known issues can be found in the following document. Specifically pointing to GTS Ethernet Hard IP related section.
2.1.1.6. Reduced Tx performance on GTS Ethernet FPGA Hard IP for 25GE...
Regards

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