I instantiate a RapidIO IP Core and the transceivers are connected to CPS1848(RapidIO Switch), here's my questions:
(1) Can I transmit and receive SRIO packets only with Avalon ST Interface, instead of using Avalon-MM?
(2) I assert the revelent signals(gen_tx_*) according to RapidIO IP core user guide, but I cannot find the value of ftype and ttype of SWRITE transaction in the user guide, where can I find the definitionof ftype and ttype?
(3) I found a reference design in AN836, but I can't download the example design(srio2_s10_avst_6g_de.par) because the website cannnot be accessed, is there any way that can download the design? Here's the link in AN836: http://fpgacloud.intel.com/devstore/platform/17.1.0/Pro/stratix-10-rapidio-ii-avalon-st-pass-through-interface/