Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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19997 Discussions

Can I use this trick for CPLD MAX V small MBGA package

Honored Contributor II



I have designed a small board with a CPLD MAXV MBGA package(5M80ZM68I5) 


since I did not use all the pins and I did not want to use high tech board production which is expensive I used ordinary Vias(Already filled and capped) between pads and connect unused pins to intended pin. 


After mass production we see a problem in some boards, 


the only JTAG pin which is connected to unused pins is TDO(Attached Photo) 


in some board CPLD could not be flashed there TDO pin status is 0V whereas in other board which can be flashed TDO=3.3V  


what is the problem? do the unused pins affect on TDO? Do they have 0V state before flashing? 


what is the I/O state(0v or 3.3v) before flashing? 


Thanks in advance for your helps.
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3 Replies
Honored Contributor II

I like the ingenuity of using standard board layout and geometries to mount a Micro-BGA package. Nice thinking. 


As for the problem - TDO should be high when not active. So, I would expect an unprogrammed part to show a logic high (3.3V in your case). 0V indicates a problem. 


User I/O pins of an unprogrammed device should be high impedance. So, I don't believe shorting TDO to these pins should be a problem. Connect TDO to lots and it might be. However, you only appear to be shorting it to two additional pins. I think this should be fine. I assume these pins aren't used once the CPLD is programmed and they remain high-impedance? 


I assume you can't detect the CPLD? 


Have you (or can you) Xray the boards? I suspect a manufacturing issue - either with the assembled board or the bare PCB. A solder splash or perhaps some compromised solder resist. You appear to have some sort of copper flood - although it's difficult to tell what layers you have displayed. How near is any copper at 0V? 



Honored Contributor II


--- Quote Start ---  

User I/O pins of an unprogrammed device should be high impedance. 

--- Quote End ---  


More exactly tri-stated with weak pull-up, up to 300 µA input current per pin according to datasheet. This should still allow JTAG operation, I rather suspect a solder fault or defective device.
Honored Contributor II

Hey Alex and FvM 


I see a misunderstanding in my mesurments 


I check those pins again and this is the result: 


On the boards that have a problem, before flashing and when probing, TDI , TMS, TDO =3.3V, TCK = 0V. 

On the boards that do not have a problem, TDI and TMS= 3.3V, while TDO and TCK = 0V 


So please consider that those boards that TDO pin is 3.3V, we have problem 


Then what is your idea? still you think about assembly issue?