- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hello,
This question is for both the Stratix II GX High Speed Serial Transceivers and the Stratix IV GX High Speed Serial Transceivers Can the TX of Transceiver-A be routed to the RX of Transceiver-A external to the FPGA? That is, is there any reason that an external loopback (off chip) cannot be done? Are there any special considerations with going from Transceiver A back to A as opposed to going from A to B? Thank you for your help,Link Copied
1 Reply
- Mark as New
- Bookmark
- Subscribe
- Mute
- Subscribe to RSS Feed
- Permalink
- Report Inappropriate Content
Hi Digitalone
Though I don't know about this A/B issue(possibly you mean two channels) but I don't forsee any problems in connecting them externally(be it in a testbench model or actual hardware) as long as Rx receives good quality LVDS signal of correct speed from fellow Tx. Regards kaz
Reply
Topic Options
- Subscribe to RSS Feed
- Mark Topic as New
- Mark Topic as Read
- Float this Topic for Current User
- Bookmark
- Subscribe
- Printer Friendly Page