Programmable Devices
CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
21607 Discussions

Clock synchronization between two DE1 boards

Altera_Forum
Honored Contributor II
‎07-20-2009 06:21 AM
1,050 Views

how to write codes to synchronize the clock signals between two DE1 boards?

0 Kudos

Link Copied

1 Reply
Altera_Forum
Honored Contributor II
‎07-20-2009 06:27 AM
426 Views

codes inVerilog HDL

0 Kudos
Copy link
Reply

Community support is provided Monday to Friday. Other contact methods are available here.

Intel does not verify all solutions, including but not limited to any file transfers that may appear in this community. Accordingly, Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.

For more complete information about compiler optimizations, see our Optimization Notice.