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Hi,
Does anyone knows concept of CRC calculation? (which is generated by ALTERA for Interlaken protocol core ) Kindly refer the document of advanced synthesis cookbook. I don't know how are they doing XOR operation for incoming 64bits? CRC24 calculation == DATA 64 bits (single cycle) Kindly see the attached file for CRC calculation. ThanksLink Copied
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Hi,
I understand you're asking about parallel calculation of the CRC. I've written this article (http://outputlogic.com/my-stuff/circuit-cellar-january-2010-crc.pdf)a while ago on the subject that you might find useful. Also, there is online tool (http://outputlogic.com/?page_id=321) to generate CRC for different polynomials and data widths. Thanks, Evgeni- Mark as New
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Hi,
Thanks for your reply. I went through that paper which u suggested but in that paper they have used matrix method. Could you just explain the concept of Table 2? i.e Mout (next state CRC) as a function of Min(current state CRC) when N=0 In that table 2 matrix ,I'm not able understand how you are making Min[0] is 1 initially i.e. Min[0] row[0] = 1 0 0 0 0 (rest of rows I understand) Mout = F(Nin=0,Min) Nin = 0 Mout[4] Mout[3] Mout[2] Mout[1] Mout[0] Min[0] 1 0 0 0 0 Thanks- Mark as New
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Mout = F(Nin=0,Min)
Nin = 0 Mout[4] Mout[3] Mout[2] Mout[1] Mout[0] Min[0] 1 0 0 0 0 Thank you sir- Mark as New
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Hi,
Each row corresponds to Mout for different Min, from 0x01 to 0x10. So, for example, when Min=0x1 (first row), Mout bits are 10000. 2'nd row is Min = 0x2, etc. The reason why it's Min[0], Min[1], etc, is that Min values are one-hot encoded. Thanks, Evgeni
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