Connection the Internal Oscillator to the PLL Input Clock in Cyclone III

[Altera_Forum]

Hello, 

 I was wondering if it is possible to connect the internal oscillator to the reference clock in a Cyclone FPGA. It just wouldn't synthesise when I tried it earlier today. It gives the following error when the code is compiled: Error (15065): Clock input port inclk[0] of PLL "PLL:PLL1|altpll:altpll_component|PLL_altpll:auto_generated|pll1" must be driven by a non-inverted input pin or another PLL, optionally through a Clock Control block  Info (15024): Input port INCLK[0] of node "PLL:PLL1|altpll:altpll_component|PLL_altpll:auto_generated|pll1" is driven by OSC:OSC_int|OSC_altint_osc_947:OSC_altint_osc_947_component|wire_cycloneiii_oscillator1_clkout which is CLKOUT output port of Oscillator block type node OSC:OSC_int|OSC_altint_osc_947:OSC_altint_osc_947_component|cycloneiii_oscillator1   If it that is not possible, I suppose you can just connect the oscillator to an output pin next to an input clock pin and connect them with a PCB trace.  Regards

[Altera_Forum]

No, it's not possible to drive a PLL directly. 

 Also, note that the internal oscillator does not produced a clock with a stable, well known, frequency. Even if you feed it through an external pin, the PLL will probably not work properly.