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Is it expected behavior for a Cyclone 4 (EP4CE15 in an F484 package) JTAG to not function until VCCIO banks 4, 5, 6, and 7 are powered? On my board, VCCIO banks 8, 1, 2, and 3 are connected to a 3.3V rail. JTAG does not seem to function until I apply power to VCCIO banks 4, 5, 6, 7; the interesting thing is that I can apply power to those banks short period of time (even a second), and JTAG will work well indefinitely thereafter. The reasons this seems surprising to me is because the JTAG pins straddle VCCIO banks 2 and 3, and do not at all seem to be physically close to VCCIO banks 4, 5, 6, 7.
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The Cyclone IV Handbook (CYIV-5V1-1.7) p266 Table 11-2, footnote (2) has the comment: "I/O banks 1, 6, 7, and 8 contain configuration pins." (I just happened to have that page of the handbook open due to my responding to another thread).
It may not be JTAG that is causing what you observe, but the undefined state of another configuration pin. Cheers, Dave- Mark as New
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Yep this makes sense, powering up domains 6 and 7 makes it work. Awesome find, Thanks!

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