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Cyclone III and DDR2 SDRAM DQ Pin Groups

Altera_Forum
Honored Contributor II
‎04-28-2010 03:54 PM
1,114 Views

In the Cyclone III Device Handbook, it says that the EP3C120 can have 6, x8 DQ groups. The Terasic Cyclone III PCI-X Development board can use a 4GB SO-DIMM with 64 DQ lines. How can you get 64 DQ lines if the part only supports 6 groups of 8, which equals 48, not 64. Any one have an idea how this could be possible? Are they mixing the top with one of the sides? i don't think that is recommened. 

 

I would like to implement the same concept in my design by using a 4GB, SO-DIMM using a Cyclone III and using either the top or the bottom I/O-bank to do so. Any thoughts or suggestions is greatly appreciated! 

 

Thanks!
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Altera_Forum
Honored Contributor II
‎05-27-2012 03:51 PM
409 Views

Hi, 

 

I also have the same interest on SODIMM on Cyclone III devices. Anyone has the schematics of this board ? 

 

Thanks, 

Franck.
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