CPLDs, FPGAs, SoC FPGAs, Configuration, and Transceivers
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I would like to have my target detect when a JTAG header is connected so I can disable the default JTAG controller outputs (using an output enable). The header will only be used during product test but the default connections will be used once deployed in the field for remote configuration and programming. Many thanks, Dave
USB Blaster output pins are initially tristated so connection of the USB Blaster isn't detectable by a level change. The only simple method I can think of is to use one of the two ground pins as sense.
Thanks FvM, yes that's the conclusion I had come to looking at the USB-Blaster schematic. It does mean only having one actual ground wire but I think it'll be fine.
As an additional remark, you can bypass the sense pin with e.g. a 100 nF ceramic capcitor directly at the connector, so it's still working as a ground, AC-wise.
