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Hi guys!
I have a little doubt... I configured a pin of my Stratrix IV FPGA as output, 2.5V, current strength 12 mA, Output termination 50 Ohm. It is connected to another device as shown in the picture attached to the thread. The clock input impedance is > 1MOhm. I concluded that 25mA(2.5/100) are being drained from the FPGA pin. Can that damage the pin or it have a protection? I didn't find any info about that on FPGA datasheet. Thanks in advance.
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