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Cyclone III - storing configuration in flash

Altera_Forum
Honored Contributor II
‎02-24-2010 01:45 PM
1,030 Views

Hi all, 

 

Ive read up on FPGA configuration as much as possible, but I still have some questions that are answered. For my application I would like to store FPGA configuration aswell as my Nios software in parallel flash (CFI).  

From what i've read, it seems that active parallel programming is only available to P30/P33 chips. Is this correct? 

 

When I change the configuration mode to active parallel, it complains that some pins are being used (the ones connected to the flash chip). I can't really understand why this is, the flash chip is connected to the processor via avalon bus and comes out to my .bdf. Am I missing something?  

 

Also, if the FPGA configuration is stored in parallel flash, how does the FPGA know where to get its config data from? Do you have to store it at a certain address? 

 

Thanks!!!
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