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Altera_Forum
Honored Contributor I
3,223 Views

Cyclone IV E, transferring data using serial port

Hello everyone, 

 

In a nutshell I have the following FPGA: http://fpga.redliquid.pl/images/ep4ce6/1.jpg 

(FPGA Cyclone IV E, ECP4E6), and what I want to do is to use the serial port. 

 

I've been following the following tutorial: 

https://www.youtube.com/watch?v=7xj9dhvdcwu 

 

(My quartus 2 is version 17.1). 

 

As far as I know this tutorial should be adapted for my specific board. I'm quite new to FPGA, so I might get confused a bit. At 3:40 is where I get confused, it is my understanding I need to map the I/O of the UART module created using that procedure to the I/O of the RS232 on the board. 

 

I don't actually know what the correspondings pins are, and also I can't manage to find anything in the documentation, but I think it's me reading something in the wrong way. 

 

Can anyone help me with this? I'm sure it is a "silly" thing to do. 

 

(of course if you know a simpler procedure please share). 

My final goal would be practice a bit with serial port and later developing some arithmetic units and passing data using my pc. 

 

https://alteraforum.com/forum/attachment.php?attachmentid=15101&stc=1 Thank you
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18 Replies
Altera_Forum
Honored Contributor I
324 Views

Hi, 

 

Your board does not have a USB interface/connector. 

You can use Hyperterminal and a serial port(RS232) on your board and establish the serial communication. 

Use Nios ii processor, on-chip memory, jtag Uart & uart(rs232 serial port) for qsys design. 

 

For more information refer to link below. 

http://my-fpga.blogspot.my/2011/02/using-rs232-on-niosii-processor.html 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
324 Views

Is that tutorial adaptable for my board + windows 10 + quartus 17.1?

Altera_Forum
Honored Contributor I
324 Views

Hi, 

 

Yes, you can use. 

Google and search for some reference design and how to install Hyperterminal on windows 10. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
324 Views

 

--- Quote Start ---  

Hi, 

 

Yes, you can use. 

Google and search for some reference design and how to install Hyperterminal on windows 10. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation) 

--- Quote End ---  

 

 

I'm not concerned about hyperterminal but for the rest of the procedure.  

 

I'll give it a go and let you know.
Altera_Forum
Honored Contributor I
324 Views

Hi again, 

 

Can you explain or give a reference why I need to istantiate the Nios II and the SDRAM block? (I get of course why I need the UART bit). Is it because I need later to create the C program that process the inputs?
Altera_Forum
Honored Contributor I
324 Views

Is the configuration below fine? It doesn't seem to me it matches exactly the link you provided.https://www.alteraforum.com/forum/attachment.php?attachmentid=15105

Altera_Forum
Honored Contributor I
324 Views

Hi, 

 

Go through some basic training. 

https://www.altera.com/support/training/curricula.html 

Refer following Links. 

https://www.youtube.com/watch?v=nhfvwthr_ew 

https://www.youtube.com/watch?v=yetvltb4hm4 

 

First, understand you board specification. 

Do you have onboard SDRAM, You can use on-chip ram instead of using SDRAM to avoid extra pin assignment work. 

To eliminate the error. 

Auto-assign the base address and interrupt from a system option from tools bar of qsys. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
324 Views

It does have an SDRAM. Just a silly question,once I create the HDL using the platform planner (I managed at last) before compiling how do I get the name of the entity to be used as top entity?

Altera_Forum
Honored Contributor I
324 Views

Hi, 

 

Go to project navigator -> Files ->select the required file(.qsys/.qip) ->right click and set as the top level entity. 

 

1.If you qsys design is top then save the project and qsys design in the same name. 

2.If you have to interface with own logic/top file than the top file and project name to be same and save the qsys design in some other name. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
324 Views

Hi Again, 

 

It's going a bit better but I still have problems. My code doesn't compile... Errors below 

 

Error (170048): Selected device has 30 RAM location(s) of type M9K. However, the current design needs more than 30 to successfully fit Info (170057): List of RAM cells constrained to M9K locations Info (170000): Node  

 

There must be an issue with my platform design. I attach the picture with my current setting: 

 

https://www.alteraforum.com/forum/attachment.php?attachmentid=15110  

 

Can you help me please?
Altera_Forum
Honored Contributor I
324 Views

Hi, 

 

Error describes that design required more memory than available. 

1.What is total memory size set in On-chip memory? (set 512 or 1024 bytes) 

 

Let me know if this has helped resolve the issue you are facing or if you need any further assistance. 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
324 Views

It should be 70Kb, following some tutorial I set it quite "large". Should I make it smaller? Also is there a rationale on why the modules in the platform designer must be connected in a certain way? 

 

Image below with the settinghttps://alteraforum.com/forum/attachment.php?attachmentid=15118&stc=1
Altera_Forum
Honored Contributor I
324 Views

Hi again, sorry still bothering. I've changed the on chip memory size to 1024, very small. It sorted out compilation issues, programming the device was also fine the only bit missing. I've used putty instead of hyperterminal as you suggested. But it kind of get stuck in the communicatio (namely I don't see any output of my C program). Any suggestion?

Altera_Forum
Honored Contributor I
324 Views

Hi, 

 

Can add your code(c program)? 

Go through the reference design online. 

ftp://ftp.altera.com/up/pub/intel_material/14.0/tutorials/using_terminals.pdf 

ftp://ftp.altera.com/up/pub/altera_material/14.0/university_program_ip_cores/communications/rs232.pd... 

Also, can you tell how the board and host machine are connected? 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation)
Altera_Forum
Honored Contributor I
324 Views

 

--- Quote Start ---  

Hi, 

 

Can add your code(c program)? 

Go through the reference design online. 

ftp://ftp.altera.com/up/pub/intel_material/14.0/tutorials/using_terminals.pdf 

ftp://ftp.altera.com/up/pub/altera_material/14.0/university_program_ip_cores/communications/rs232.pd... 

Also, can you tell how the board and host machine are connected? 

 

Best Regards, 

Anand Raj Shankar 

(This message was posted on behalf of Intel Corporation) 

--- Quote End ---  

 

 

C Code: 

 

#include <stdio.h> int main() { printf("Hello from Nios II!\n"); char X; X = getchar(); printf("**** yeah!\n"); return 0; }  

 

About the connection, not sure what to answer. I have a usb-serial cable. I attach some pictures with my settings 

 

https://alteraforum.com/forum/attachment.php?attachmentid=15126&stc=1  

https://alteraforum.com/forum/attachment.php?attachmentid=15127&stc=1  

https://alteraforum.com/forum/attachment.php?attachmentid=15128&stc=1  

 

https://alteraforum.com/forum/attachment.php?attachmentid=15130&stc=1  

 

Any suggestions?
Altera_Forum
Honored Contributor I
324 Views

There was an issue with the "flow control", according to the guide is supposed to be set to NONE. Still anyway can't manage to make it work.

Altera_Forum
Honored Contributor I
324 Views

Hi, please can you help me out with this?

Altera_Forum
Honored Contributor I
324 Views

Hi, just an update, I thought my serial wasn't worsking for some reason. But I've tested with the example provided with my board (which implements in VHDL from scratch a serial port). This seems to work fine, it essentially prints back any input provided. Still I cannot manage to make it work using the settings above. I wonder if this can have anything to do with the "Quartus prime lite edition" I'm using.

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