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Hello everyone,
As I am working on my thesis I have encounterd a problem.
I have Cyclone IV EP4CE6E22 and it is connected to two nodeMCUs.
First nodeMCU sends data from RC522 RFID module and the second is supposed to send data aquired from MQTT server to FPGA.
First nodeMCU connected to PIN 100, works perfecly, second one does not work at all (connected to PIN 106) and GND is connected between boards and FPGA.
My Verilog code is uploaded on github: lejlahusi/IWM-Inventory-Warehouse-Managment: My final university thesis. (github.com)
Reason why I have two nodeMCUs is cuz RFID sensor will not always read RFID tags.
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Hi,
Welcome to Intel's forum. Kindly give me some time and I will look into your question deeply. Thank you.
Regards,
Kelly
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Hi,
I can't seem to locate your .v file in the Github link you provided. Could you point to me the directory/path your verilog file is kept?
Thank you.
Regards,
Kelly
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Hi,
As I looked into your .v files, I might have found the root cause where pin 103 and 69 will not work as it is only assigned to pin 106 at the .qsf file at line 80.
At the dplomskirad.qsf file, you have assigned PIN_100 -to RxD. At your uartrx2.v and uartrx.v file you have both input as RxD resulting in both UARTs have the same functionality and same input from pin 100. However for pin 106, both UARTs are not working as it is not defined in any of the .v files that you have as there are no input RXD2.
I would suggest to have a new .v file that is able to call RXD2 and use pin_106 as UART2.
Hope this helps. Thank you.
Regards,
Kelly
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Hi,
Any updates from your side?
Thank you.
Regards,
Kelly
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I had no luck. I made another module called uartrx2 as you suggested, initialized pin 100 for uart1 and pin 84 for uart2. Check .qsf file to are they properly assigned, and they are, but still uart2 wont work. So I changed pins to see if pin 84 works, I assigned pin 84 to uart1 and pin 100 to uart2, and uart1 works, uart2 does not work. To check if my second nodeMCU is sending data I connected it to uart1 pin and it does work.
I have no clue why is that happening because both grounds are connected, I used pins that have DIFFIO function, but for some reason second uart used in code does not work.
Here is link to my code: https://github.com/lejlahusi/FPGA.git
Thank you so much for the effort.
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Hi,
Cyclone IV offers 'DIFFIO_xxp/n' pairs. These can be used as either input or output LVDS pairs. You cannot use 'DIFFIO_tx' pairs as inputs(dual ended inputs). You will need to use LVDS I/O standard in order to use LVDS.
Thank you.
Regards,
Kelly
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Hi,
Any updates from your side regarding the new information provided?
Regards,
Kelly
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Hi,
As we do not receive any response from you on the previous answer that we have provided. Please login to ‘https://supporttickets.intel.com’, view details of the desire request, and post a feed/response within the next 15 days to allow me to continue to support you. After 15 days, this thread will be transitioned to community support. The community users will be able to help you on your follow-up questions.
p/s: If any answer from the Intel Support is helpful, please feel free to provide ratting with 9/10 survey.
Thank you.
Regards,
Kelly Jialin, GOH
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