Cyclone V DDR3 termination resistor

[Altera_Forum]

Hello, 

 I am currently working on the design of a Cyclone V SE board with 2 DDR3 memory chips. I am wondering if it is necessary to have the termination resistors for the adress / command signals ?  The developpement kit have termination resistors, but when i look at others microcontroller reference board, it appears not to be necessary.  Is it mandatory with the Cyclone V, or is it related to the number of chips, or the layout ?  I had developped many electronic boards, but the DDR3 challenge is new for me.  Thanks in advance, Regards, Alex

[Altera_Forum]

I don't know the answer to that question but it's probably in this document: http://www.altera.com/literature/an/an520.pdf 

 I found that on the board design guidelines page here: http://www.altera.com/technology/signal/board-design-guidelines/sgl-bdg-index.html

[Altera_Forum]

Hi, 

 Thanks, i know this document and at page 1-50, it is written that we have to place termination in the case of DDR3 components in a fly by topology which is not supported by the Cyclone V. But i don't see the case of the T-Topology.