Cyclone V E active serial load from N25Q00 QUAD SPI FLASH

Altera_Forum · ‎05-19-2014

Hi All,

I'm trying to use Micron N25Q00 1Gbit serial QUAD SPI FLASH to load Cyclone V E (A7) using active serial interface.

I currently have boards that have Cyclone V 5CEFA7U19C8 and are loading from N25Q064 via active serial interface, but we need a lot more FLASH.

Quartus II 13.1 does not support 1Gbit QSPI devices so I have my own QSPI controller (using the dedicated active serial pins) that can read and program N25Q00 from NIOS.

I verified I can reliably read and program both N25Q00 and N25Q064 devices.

I'm using .rbf file and downloading it to the QSPI via UART. I can also read back and verify the downloaded rbf. The rbf file is generated for active serial mode.

When I use a board with N25Q064 (64Mbit), Cyclone V boots and works just fine.

Downloading the same rbf file to a board with N25Q00 (1Gbit) does not work. The FPGA constantly tries to load over the SPI interface and fails.

I've tried both x1 and x4 mode and different clock speeds. They all work on the 64Mbit, but not on the 1Gbit part.

I also verified that the rbf file do not change based on the EPCQ size selected. I can load rbf file generated for EPCQ256 on 64Mbit part and it works just fine.

Besides memory size, all other parameters are the same between the 64M part and the 1G part.

The 1G part supports 4 byte address, but by default works in 3 byte address mode and looks like and can access the first 128Mbits. The FPGA image is compressed and is under 20Mbits so it does not cross segment boundary. Supposedly Cyclone V supports EPCQ256 which supports 4 byte address and the only difference is that it has one die vs. 4 dies for N25Q00.

Anybody has any idea if Cyclone V checks for the QSPI size when booting?

Any other thought or suggestions that can help understand the problem will be highly appreciated.

Thanks!

Altera_Forum · ‎05-19-2014

--- Quote Start ---

Anybody has any idea if Cyclone V checks for the QSPI size when booting?

--- Quote End ---

The FPGA does not check the size, but it does do an ID check. I forget which OPCODE it uses, but its one of read ID (0x9F) or read electronic signature (silicon ID) 0xAB (you could use an oscilloscope to see which one the Cyclone V is using at power-on. I recall that the device first issues a write-disable).

Either way, in the Advanced Settings of the configuration file conversion tool, you can disable the ID check. So long as the READ (or FAST_READ) opcode matches the standard parts, it should work fine.

Cheers,

Dave

Altera_Forum · ‎05-20-2014

Hi Dave,

Thanks for the quick response.

I believe you are talking about Manufacturing ID (0x20) and Device ID (0xBA). They are all the same for all N25Q devices including the 64M and 1G devices. The only difference is Memory Capacity ID(0x17 for 64M and 0x21 for 1G part). Also the 1G part support all 64M part commands(OPCODEs) for backward compatibility.

I've checked with scope the what the FPGA reads from the SPI on boot and I can see that the data in both cases (64M and 1G) is read correctly (at least first several bytes that are different form 0xFF). I can try to capture more using LA, but it is going to take time.

About the idea to disable ID check - I'm not sure how to do that.

The file conversion tool does not work for generating rbf files for active serial mode.

I found that the hard way after couple of days of trying - the only way I know to get a good rbf file is to set the rbf file to be automatically generated with the sof file in the device configuration options. Is there another way to disable ID check and get good rbf file for active serial mode?

Are you sure the ID check option is for the FPGA boot or for the JTAG debugger when programs the jic file?

Thanks again,

Krassimir

Altera_Forum · ‎05-20-2014

Go to Spansion's FL site

http://www.spansion.com/products/memory/serial-flash/pages/spansion%20fl.aspx

click on the "Technical Documents" link and scroll down to "Connecting Spansion SPI Serial Flash to Configure Altera FPGAs"

http://www.spansion.com/support/application%20notes/configuring_altera_fpgas_via_spi_flash_an.pdf

I think that app note has the details, but I did not re-read it, so ask again if it does not :)

--- Quote Start ---

Are you sure the ID check option is for the FPGA boot or for the JTAG debugger when programs the jic file?

--- Quote End ---

Its part of the initial SPI flash byte-stream instructions. I suspect the Cyclone V performs a few instructions, reads a header, and then decides whether or not to check the previously read ID. Once you figure out how to toggle the check ID setting, you can compare the RBFs and you'll see the byte that is different. The SRunner program has lots of the flash internals documented, i.e., its the documentation for the "undocumented" features :)

You can also search the forum for threads regarding using Spansion flash, I recall it has been discussed before. For example, some of the DE0-nano boards shipped with Spansion flash and users were asking how to use it ... I think they got it figured out.

Cheers,

Dave

Altera_Forum · ‎05-20-2014

Hi Dave,

I've read through the Spansion app note, but there is not much relevant information there.

I also downloaded and looked the SRunner source code.

SRunner uses .rpd files to download the FPGA image. It seems to me the file is written as raw data into the EPCS flash.

Using the Convert Programming Files menu in Quartus I generated .rpd file for active serial and disabled ID check in the advanced menu. Active Serial is available as an option for .rdp files, but is not available for .rbf files.

I've compared the .rpd and .rbf files and they look the same in the beginning, but are different after that.

I've also programmed the .rpd file in the 64M FLASH, but it does not work.

I'm not sure what else to try.

It seems like the problem comes down to how to generate .rbf file for Active Serial configuration with the ID check disabled.

Thanks,

Krassimir

Altera_Forum · ‎05-20-2014

--- Quote Start ---

I've read through the Spansion app note, but there is not much relevant information there.

--- Quote End ---

You found the Check ID but for .rpd generation, so that must be what I was recalling. I'm pretty sure you are supposed to be using the .rpd file format, not the .rbf.

What are you using to program your flash device? Are you using a USB-Blaster via a 10-pin JTAG header, or are you using custom code? If you are using custom code, then keep in mind that the AS data stream needs its bytes in LSB-to-MSB order, whereas SPI Flash uses MSB-to-LSB. That means you have to send SPI Flash opcodes in MSB-to-LSB order, but you need to reverse the data bytes written to the flash.

Cheers,

Dave

Altera_Forum · ‎05-20-2014

I'm using a custom SW that runs on NIOS and downloads the .rbf file via generic UART. I'm using the USB-Blaster just to run the NIOS code.

This is all has been verified and works just fine.

I kept digging in the .rbf files and I think I found the ignore ID bit in the .rbf header.

Unfortunately the .rbf file is generated for passive serial so I can't use it directly:

Here is the beginning of the .rbf file with ID check disabled (passive serial):

00000000 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ

00000010 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ

00000020 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ

00000030 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ

00000040 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ

00000050 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ

00000060 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ

00000070 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF ÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿÿ

00000080 6A 6A 6A 6A 3E F0 FF FF 77 FD FF FF B6 F3 FF FF jjjj>ðÿÿwýÿÿ¶óÿÿ

00000090 37 F5 FF FF F6 F2 FF FF 77 F0 FF FF 33 F9 FF FF 7õÿÿöòÿÿwðÿÿ3ùÿÿ

000000A0 BA F9 FF FF 19 F0 FF FF B8 F0 FF FF 5B F5 FF FF ºùÿÿ.ðÿÿ¸ðÿÿ[õÿÿ

000000B0 79 F6 FF FF 5B F9 FF FF 59 F8 FF FF 19 F4 FF FF yöÿÿ[ùÿÿYøÿÿ.ôÿÿ

000000C0 BD F6 FF FF BD F2 FF FF 58 F4 FF FF 7C F4 FF FF ½öÿÿ½òÿÿXôÿÿ|ôÿÿ

000000D0 7F F6 FF FF 7A F2 FF FF 9D F3 FF FF 99 F0 FF FF .öÿÿzòÿÿ.óÿÿ™ðÿÿ

000000E0 BB F3 FF FF 3C F4 FF FF 18 F5 FF FF 58 F0 FF FF »óÿÿ<ôÿÿ.õÿÿXðÿÿ

000000F0 19 F0 FF FF 59 F2 FF FF 19 F0 FF FF 99 F2 FF FF .ðÿÿYòÿÿ.ðÿÿ™òÿÿ

00000100 9C F1 FF FF 19 F5 FF FF 19 F5 FF FF 4E F3 FF FF œñÿÿ.õÿÿ.õÿÿNóÿÿ

00000110 9E F7 FF FF 1A F4 FF FF EE F4 FF FF 1A F1 FF FF ž÷ÿÿ.ôÿÿîôÿÿ.ñÿÿ

00000120 6E F1 FF FF 00 00 91 F2 FF FF FF FF FF FF FF FF nñÿÿ..‘òÿÿÿÿÿÿÿÿ

Here is the .rbf file with ID check enabled (passive serial):