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Cyclone V FPGA SPI Flash programming

FPGA3
Employee
624 Views

We are trying to support the SPI flash programming from our FPGA design ported over from Xilinx device. We couldn't find any demo design.

Meanwhile we tried the JIC programming as well for the N23Q128A device but it failed with following error. 

Error (209025): Can't recognize silicon ID for device 1. A device's silicon ID is different from its JTAG ID. Verify that all cables are securely connected, select a different device, or check the power on the target system. Make sure the device pins are connected and configured correctly.

 

 

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7 Replies
YuanLi_S_Intel
Employee
612 Views
FPGA3
Employee
568 Views

Hi Yuan:

 

There are 2 particular issues we are needing help with:

1. SPI Programming failure with JIC file. The device seems to be supported in the guide we looked up online.

  • •Not able to program the SPI flash with JIC file
  • •Error (209025): Can't recognize silicon ID for device 1. A device's silicon ID is different from its JTAG ID. Verify that all cables are securely connected, select a different device, or check the power on the target system. Make sure the device pins are connected and configured correctly.
  • •Device is in AS mode - MX25L12833FMI-10Gi
  • •Device configurations tried to generate JIC files are EPCS128, EPCQ128 & EPCQ128A

 

2. Adding SPI Programming support in the FPGA design  

  • Since this is a ported design Current design has SPI programmer RTls available what ways we can use that and assign to the IO since the IO’s are hardened we can’t assign them.
  • Which Ips to use?
  • Also i couldn't find any demo design for this. Any further info/discussion on this will be very helpful.
YuanLi_S_Intel
Employee
553 Views

Hi,

 

Please find my response below:

1. SPI Programming failure with JIC file. The device seems to be supported in the guide we looked up online.

•Not able to program the SPI flash with JIC file

•Error (209025): Can't recognize silicon ID for device 1. A device's silicon ID is different from its JTAG ID. Verify that all cables are securely connected, select a different device, or check the power on the target system. Make sure the device pins are connected and configured correctly.

•Device is in AS mode - MX25L12833FMI-10Gi

•Device configurations tried to generate JIC files are EPCS128, EPCQ128 & EPCQ128A

Can you select MX25 when generating the JIC file?

 

Also, please check the following as stated in the link below:

https://www.intel.com/content/www/us/en/programmable/quartushelp/13.0/mergedProjects/msgs/msgs/epgme_device_siid_error.htm

 

2. Adding SPI Programming support in the FPGA design 

Since this is a ported design Current design has SPI programmer RTls available what ways we can use that and assign to the IO since the IO’s are hardened we can’t assign them.

Which Ips to use?

Also i couldn't find any demo design for this. Any further info/discussion on this will be very helpful.

You cant assign and use the IO which is used as configuration pin. To do flash content updating, you may consider using our IP such as Serial Flash IP for AS mode.

https://www.intel.com/content/www/us/en/docs/programmable/683299/current/using-the-fpga-serial-flash-loader-ip-85096.html

 

Regards,

Bruce

 


FPGA3
Employee
546 Views

Hi Bruce,

 

I dont see an option for MX25. Here is the snapshot.

FPGA3_0-1645555414813.png

 

YuanLi_S_Intel
Employee
537 Views

Can you click the ... beside configuration devices? Then select MX25 inside.


FPGA3
Employee
531 Views

It just gives me an option for EPCS, EPCQ. Check out the snapshot below.

 

FPGA3_1-1645593623144.png

 

 

YuanLi_S_Intel
Employee
529 Views

which quartus version you are using? Can you try with latest quartus version?


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