I have been trying to get the fpga2sdram bridge to work on my de1-soc board in order to be able to write to the HPS DDR3 RAM from the FPGA side with no luck. I have done the following steps:
- Added the FPGA2SDRAM bridge in Qsys->HPS
- Generated the synthesis files
- Opened the SoC EDS shell and ran bsp-editor
- Selected the hps_isw_handoff folder.
- Checked FAT_SUPPORT and Generated the files.
- cd'd into the software/spl_bsp folder and ran make and make uboot.
- Copied the preloader onto the A2 partition with alt-boot-disk-util.
- Copied the u-boot.img onto the FAT partition.
however, when power up the board, I get nothing on the UART terminal.
Is there something that I am missing?
May I know which Quartus/SOC EDS you are using?
One thing to check, please check the BSEL pin in your board to boot from SDCARD if you are using that.
Otherwise, please follow the all the steps here to check from creating the image and board pin setup, select Cyclone and version you're using and the topics you're interested in:
Or you may get our prebuilt image (depending on which Quartus version you use) to boot to see how it should boot (you will need to check the board pin as well for this):