Cyclone V Transceiver Reference Clock for SATA

[Altera_Forum]

I have configured a Cyclone V transceiver for a SATA development and have a very basic architecture running on the Cyclone V GX development board in a loopback fashion. 

 The transceiver is configured very similar to that documented in the cyclone v handbook (http://www.altera.co.uk/literature/hb/cyclone-v/cv_53004.pdf) (SATA and SAS Protocols section) but I was wondering if this is only a guide specifically with the reference clock i.e. does it have to be 150MHz for some reason e.g. SATA PPM requirements etc. It would be nicer to have a lower frequency reference clock such that bespoke hardware is easier to develop in the future but I don't fully appreciate the reason this states 150MHz.   Any help is much appreciated as I am on the learning curve with the Altera transceivers.

[Altera_Forum]

hi, all  

1. anyone know what is the difference between the rx_signaldetect for receiving the COMINIT and the rx_signaldetect for receiving the COMWAKE?  How do we differentiate between both using rx_signaldetect?  2. Does the Host Controller remain at a constant speed per run? I mean cant we change the Controller from Gen1 to Gen2 dynamically?  Thanks Angad

[Altera_Forum]

Hi Angad 

Firstly in future please start a new thread regarding your topic if it doesn't already exist to avoid hijacking an existing thread that is off-topic.    --- Quote Start ---  hi, all  1. anyone know what is the difference between the rx_signaldetect for receiving the COMINIT and the rx_signaldetect for receiving the COMWAKE?  How do we differentiate between both using rx_signaldetect?  2. Does the Host Controller remain at a constant speed per run? I mean cant we change the Controller from Gen1 to Gen2 dynamically?   --- Quote End ---    A1: COMINIT idle (quiet) time is 480UI (unit intervals) or 310.4 to 329.6ns and COMWAKE idle time is 160UI or 103.47 to 109.87ns, therefore the signal detect can be used to detect these periods as per the OOB protocol sequence in the SATA specifications.  A2. Speed negotiation is performed during the OOB protocol sequence in which the device is in control of i.e. it starts at the highest generation signalling speed and works down until the host locks and detects the ALIGN primitive and signals ALIGN back. Once the speed is negotiated it remains until the OOB protocol is performed again with the exception of the optional power management.

[Altera_Forum]

--- Quote Start ---  Hi Angad Firstly in future please start a new thread regarding your topic if it doesn't already exist to avoid hijacking an existing thread that is off-topic.    A1: COMINIT idle (quiet) time is 480UI (unit intervals) or 310.4 to 329.6ns and COMWAKE idle time is 160UI or 103.47 to 109.87ns, therefore the signal detect can be used to detect these periods as per the OOB protocol sequence in the SATA specifications.  A2. Speed negotiation is performed during the OOB protocol sequence in which the device is in control of i.e. it starts at the highest generation signalling speed and works down until the host locks and detects the ALIGN primitive and signals ALIGN back. Once the speed is negotiated it remains until the OOB protocol is performed again with the exception of the optional power management.  --- Quote End ---     Correct me if I am wrong. Suppose the Host always start(power-on) with lowest speed(Gen1), then host cannot be changed to Gen2?