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Hi!
Just wanted to make sure I got this right: I am using the DE1-SoC (Cyclone V FPGA). There is no way to change the output Voltage of the GPIO-Pins internally (in Quartus or by jumpers)? If I want to have another voltage than 2.5 V, I have to use some external components like a level shifter. Is that correct? RegardsLink Copied
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Correct, the voltage is not controlled by settings but rather the I/O supply for that bank so if you need to change the level you either need to change the bank supply or use something like a level shifter. The level granularity is per bank so typically you pick the most common voltage for the bank then use level shifters if you need a different I/O level for a handful of pins on the same bank.
By the way, the I/O are capable of a wide voltage swing on the input side. For example if the bank is 3.0V you can typically feed a 2.5V signal into it and the input will be measured as a 0/1 correctly. I suspect if you look at the schematic for that board you'll see some instances of that since it's a fairly common thing to do. See the "I/O Standard Specification" section of this document: http://www.altera.com/literature/hb/cyclone-v/cv_51002.pdf The Vil and Vih values tell you what threshold the input pins will consider the value to be a 0 or 1 so for 3.0V CMOS you can see a 2.5V input is between the min and max of 1.7-3.6 range to be an active high signal. For output signals you don't have this flexibility but I would look at the datasheet of the device you want to connect, it may have the ability to support a wide voltage swing just like the FPGA.- Mark as New
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Thank you for the clarification. Suppose I wanted to change the bank supply, how/where would I achieve that?
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You would have to power the bank off a different power rail. In other words this isn't something under programmable control, you have to physically connect the bank to a different rail which could be very difficult depending on the layout of the board. If you look at the schematics you'll see the bank voltages with names like "Vccio"
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Ok, that does not seem to be an option.
Suppose I used a SoCKit Board with this daughter card: http://www.terasic.com.tw/cgi-bin/page/archive.pl?language=english&categoryno=67&no=322 As the SoCKit can vary the output voltage of the hsmc output pins, would that voltage be kept within the daughter card and thus be availabe on its gpio pins? I need to get 1.5 Volts to the gpio pins as a level shifter seems to delay the signals too much.- Mark as New
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Double check the mainboard to make sure the I/O routed to that connector has the bank I/O on the same rail that is supplied to the card. If you are not sure which bank each of the I/O is on you can look it up in the device pinouts or look them up in the Quartus pin planner. It doesn't matter which voltage is routed to the card if the FPGA I/O bank is on an incompatible bank voltage.
Also keep in mind that you don't always have to use the same bank I/O voltage as the items connected on the other side. That link in my first post shows the I/O capabilities and it's quite common to mix and match voltages as long the FPGA and the other device are compatible with the voltage combination.- Subscribe to RSS Feed
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